Course Evaluation Customization Form

Viewing: EE 271, section 01


Term: 1192 - 1192
Instructor: Raina

Learning Goals

Build logic gates from transistors and wires and model and optimize their delay and power.
How well did you achieve this learning goal in this course?


Optimize the delay and power of chain of logic gates.

How well did you achieve this learning goal in this course?


Build sequential logic using clocks and storage elements; understand the tradeoffs between different clocking methods like flip-flops, two phase latches and pulsed latches.
How well did you achieve this learning goal in this course?


Design a complex digital system by describing it in hardware description languages like Verilog or SystemVerilog.
How well did you achieve this learning goal in this course?


Write generators for complex digital systems using meta-programming systems like Genesis 2.
How well did you achieve this learning goal in this course?


Verify the system by simulating it and comparing the results against a C++ gold model and using formal methods.
How well did you achieve this learning goal in this course?


Measure the system's power, performance and area; build an intuition for tradeoff's between these and iterate on the design to optimize them.
How well did you achieve this learning goal in this course?


Course Elements

How useful to you was the final project?


How useful to you were the guest speakers?


How useful to you were the lectures?


How useful to you were the problem sets?


How useful to you was/were the review sessions?


Additional Questions

Do you feel well equipped to design a digital block/chip for your research/in your job after taking this class? What can we add/remove from the class to equip you better?



Process Comments:

Key: 22065
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